1. Field of the Invention
The invention is directed to semiconductor devices and to methods for passivating semiconductor devices.
2. Description of the Prior Art
Semiconductor devices employing planar passivation are well known in the art. A substrate, or chip, of semiconductor material such as silicon or germanium is covered on one surface by an oxide material such as silicon dioxide. Through photolithographic techniques, windows are cut in the oxide material so that a portion of the chip is exposed. In order to define transistor junctions within the chip, impurities such as boron and phosphorus may be diffused into the chip through the windows. A plurality of transistor junctions may be formed, provided that an oxide layer covers all portions of the surface of the chip other than those through which an impurity is to be diffused.
In order to protect the chip and the transistor junctions diffused therein, one may provide an insulating layer of an oxide over which a barrier comprising a layer of silicon nitride is formed. The silicon nitride is a denser dielectric than silicon dioxide and inhibits the migration of contaminating mobile ions through the dielectric to the surface of the chip. The use of a silicon nitride barrier is shown in U.S. Pat. No. 3,597,667, issued to F. H. Horn and assigned to the present assignee.
In order to provide an electrical connection to the semiconductor device, metallic electrical contacts are conventionally applied to appropriate exposed portions of the semiconductor chip. Many metals have been used as contacts, but aluminum heretofore has been the metal principally employed. As a contact, aluminum has many drawbacks, including a low melting point and a tendency to corrode. Accordingly, contacts have been developed which employ a first layer of platinum silicide upon which is formed successive layers of molybdenum and gold. The application of these constituents is effected by photolithographic techniques similar to those employed in forming the transistor junctions.
In order to protect the semiconductor device and extend its operating life by providing a barrier to alkali ion migration and moisture, a semiconductor chip is coated on all surfaces with a layer of sealing material, which sealing material commonly comprises glass.
Unfortunately, the various types of glass heretofore used as sealants have protected the semiconductor devices to less than an optimum extent. Problems have arisen with respect to cracking of the glass after deposition and difficulties in etching the glass to expose the metallic contacts. Many glasses previously used require a high firing temperature which degrades the electrical properties of the semiconductor device and which leads to alloying of the metallic contacts. Additionally, many glasses previously used have adhered poorly to the metallic contacts prior to etching, and consequently, stresses have been created, which stresses weaken both the glass and the contacts. Pinholes in the glass have allowed the entrance of alkali ions and moisture with a resulting decrease in power dissipation, reliability, and operating life.
Accordingly, it is an object of the invention to provide a semiconductor device and method of manufacture therefor wherein pinholes in the sealant are eliminated and the semiconductor device has a higher degree of reliability.
It is another object of the invention to provide a semiconductor device and method of manufacturing therefor wherein the semiconductor device has the capability to dissipate more power and has a longer operating life.
It is a further object of the invention to provide a method for forming a semiconductor device resulting in little or no alloying of metallic electrical contacts and resulting in reduced stresses between the contacts and a glass sealant.